The present disclosure relates to semiconductor structures, and particularly to fin-type field effect transistor structures and a method of manufacturing the same.
Fully depleted devices such as fin field effect transistors (finFETs) are candidates for scaling of gate lengths to 14 nm and below. A narrow fin structure may be optimal for channel control, but can lead to increased contact resistance in the source/drain. A larger contact area (and hence less contact resistance) can be provided by merging the fins in the source/drain, and contact resistance may be further reduced by converting an upper portion of epitaxial material in the source/drain to a silicide. However, epitaxial growth to merge the fins has proven to be challenging. The interface where epitaxial growth from facing fin sidewalls can be defective and such defects can provide a preferred diffusion path such as for nickel, which can be fatal to the associated device.
A more defect-free surface on which to form a contact can be achieved by stopping the epitaxial growth before facing growth fronts touch, such that the source drain fins become wider but are not merged. However, silicidation of the unmerged source drain introduces new defects. A process to form finFET transistors that avoids such defects would be desirable.